Discussion:
[PATCH 0/3] irqchip: irq-bcm2836: add support for DT interrupt polarity
(too old to reply)
Stefan Wahren
2017-12-11 20:39:09 UTC
Permalink
This patch series implements DT polarity support for the 1st level interrupt
controller.

Stefan Wahren (3):
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts

.../interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 +-
arch/arm/boot/dts/bcm2836.dtsi | 14 +++----
arch/arm/boot/dts/bcm2837.dtsi | 12 +++---
arch/arm/boot/dts/bcm283x.dtsi | 1 +
drivers/irqchip/irq-bcm2836.c | 46 +++++++++++++---------
5 files changed, 44 insertions(+), 33 deletions(-)
--
2.7.4
Stefan Wahren
2017-12-11 20:39:10 UTC
Permalink
This increases the interrupt cells for the 1st level interrupt controller
binding in order to describe the polarity like on the other ARM platforms.

Signed-off-by: Stefan Wahren <***@i2se.com>
---
.../devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt
index f320dcd..8ced169 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt
@@ -12,7 +12,7 @@ Required properties:
registers
- interrupt-controller: Identifies the node as an interrupt controller
- #interrupt-cells: Specifies the number of cells needed to encode an
- interrupt source. The value shall be 1
+ interrupt source. The value shall be 2

Please refer to interrupts.txt in this directory for details of the common
Interrupt Controllers bindings used by client devices.
@@ -32,6 +32,6 @@ local_intc: local_intc {
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupt-parent = <&local_intc>;
};
--
2.7.4
Eric Anholt
2017-12-15 21:53:17 UTC
Permalink
Post by Stefan Wahren
This increases the interrupt cells for the 1st level interrupt controller
binding in order to describe the polarity like on the other ARM platforms.
I'm happy with this. Any DT maintainer concerns?
Rob Herring
2017-12-15 22:23:17 UTC
Permalink
Post by Stefan Wahren
This increases the interrupt cells for the 1st level interrupt controller
binding in order to describe the polarity like on the other ARM platforms.
---
.../devicetree/bindings/interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Rob Herring <***@kernel.org>
Stefan Wahren
2017-12-11 20:39:12 UTC
Permalink
This patch define the polarity of the per-cpu interrupts on BCM2836
and BCM2837 in order to avoid the warnings from ARM arch timer code:

arch_timer: WARNING: Invalid trigger for IRQ19, assuming level low
arch_timer: WARNING: Please fix your firmware
arch_timer: cp15 timer(s) running at 19.20MHz (virt).

Signed-off-by: Stefan Wahren <***@i2se.com>
---
arch/arm/boot/dts/bcm2836.dtsi | 14 +++++++-------
arch/arm/boot/dts/bcm2837.dtsi | 12 ++++++------
arch/arm/boot/dts/bcm283x.dtsi | 1 +
3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi
index 61e1580..1dfd764 100644
--- a/arch/arm/boot/dts/bcm2836.dtsi
+++ b/arch/arm/boot/dts/bcm2836.dtsi
@@ -13,24 +13,24 @@
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupt-parent = <&local_intc>;
};

arm-pmu {
compatible = "arm,cortex-a7-pmu";
interrupt-parent = <&local_intc>;
- interrupts = <9>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
};
};

timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&local_intc>;
- interrupts = <0>, // PHYS_SECURE_PPI
- <1>, // PHYS_NONSECURE_PPI
- <3>, // VIRT_PPI
- <2>; // HYP_PPI
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
+ <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
+ <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
+ <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
always-on;
};

@@ -76,7 +76,7 @@
compatible = "brcm,bcm2836-armctrl-ic";
reg = <0x7e00b200 0x200>;
interrupt-parent = <&local_intc>;
- interrupts = <8>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
};

&cpu_thermal {
diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
index bc1cca5..efa7d33 100644
--- a/arch/arm/boot/dts/bcm2837.dtsi
+++ b/arch/arm/boot/dts/bcm2837.dtsi
@@ -12,7 +12,7 @@
compatible = "brcm,bcm2836-l1-intc";
reg = <0x40000000 0x100>;
interrupt-controller;
- #interrupt-cells = <1>;
+ #interrupt-cells = <2>;
interrupt-parent = <&local_intc>;
};
};
@@ -20,10 +20,10 @@
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&local_intc>;
- interrupts = <0>, // PHYS_SECURE_PPI
- <1>, // PHYS_NONSECURE_PPI
- <3>, // VIRT_PPI
- <2>; // HYP_PPI
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
+ <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
+ <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
+ <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
always-on;
};

@@ -73,7 +73,7 @@
compatible = "brcm,bcm2836-armctrl-ic";
reg = <0x7e00b200 0x200>;
interrupt-parent = <&local_intc>;
- interrupts = <8>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
};

&cpu_thermal {
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index e08203c..0d43bd4 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -2,6 +2,7 @@
#include <dt-bindings/clock/bcm2835.h>
#include <dt-bindings/clock/bcm2835-aux.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>

/* firmware-provided startup stubs live here, where the secondary CPUs are
* spinning.
--
2.7.4
Stefan Wahren
2017-12-11 20:39:11 UTC
Permalink
In order to properly define the polarity of the per-cpu interrupts,
we need to support for a second property cell. But this must be
optional to keep backward compatibility with old DT blobs.

Suggested-by: Marc Zyngier <***@arm.com>
Signed-off-by: Stefan Wahren <***@i2se.com>
---
drivers/irqchip/irq-bcm2836.c | 46 ++++++++++++++++++++++++++-----------------
1 file changed, 28 insertions(+), 18 deletions(-)

diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c
index 667b9e1..dfe4a46 100644
--- a/drivers/irqchip/irq-bcm2836.c
+++ b/drivers/irqchip/irq-bcm2836.c
@@ -98,13 +98,35 @@ static struct irq_chip bcm2836_arm_irqchip_gpu = {
.irq_unmask = bcm2836_arm_irqchip_unmask_gpu_irq,
};

-static void bcm2836_arm_irqchip_register_irq(int hwirq, struct irq_chip *chip)
-{
- int irq = irq_create_mapping(intc.domain, hwirq);
+static int bcm2836_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hw)
+{
+ struct irq_chip *chip;
+
+ switch (hw) {
+ case LOCAL_IRQ_CNTPSIRQ:
+ case LOCAL_IRQ_CNTPNSIRQ:
+ case LOCAL_IRQ_CNTHPIRQ:
+ case LOCAL_IRQ_CNTVIRQ:
+ chip = &bcm2836_arm_irqchip_timer;
+ break;
+ case LOCAL_IRQ_GPU_FAST:
+ chip = &bcm2836_arm_irqchip_gpu;
+ break;
+ case LOCAL_IRQ_PMU_FAST:
+ chip = &bcm2836_arm_irqchip_pmu;
+ break;
+ default:
+ pr_warn_once("Unexpected hw irq: %lu\n", hw);
+ return -EINVAL;
+ }

irq_set_percpu_devid(irq);
- irq_set_chip_and_handler(irq, chip, handle_percpu_devid_irq);
+ irq_domain_set_info(d, irq, hw, chip, d->host_data,
+ handle_percpu_devid_irq, NULL, NULL);
irq_set_status_flags(irq, IRQ_NOAUTOEN);
+
+ return 0;
}

static void
@@ -165,7 +187,8 @@ static int bcm2836_cpu_dying(unsigned int cpu)
#endif

static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = {
- .xlate = irq_domain_xlate_onecell
+ .xlate = irq_domain_xlate_onetwocell,
+ .map = bcm2836_map,
};

static void
@@ -218,19 +241,6 @@ static int __init bcm2836_arm_irqchip_l1_intc_of_init(struct device_node *node,
if (!intc.domain)
panic("%pOF: unable to create IRQ domain\n", node);

- bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTPSIRQ,
- &bcm2836_arm_irqchip_timer);
- bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTPNSIRQ,
- &bcm2836_arm_irqchip_timer);
- bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTHPIRQ,
- &bcm2836_arm_irqchip_timer);
- bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTVIRQ,
- &bcm2836_arm_irqchip_timer);
- bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_GPU_FAST,
- &bcm2836_arm_irqchip_gpu);
- bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_PMU_FAST,
- &bcm2836_arm_irqchip_pmu);
-
bcm2836_arm_irqchip_smp_init();

set_handle_irq(bcm2836_arm_irqchip_handle_irq);
--
2.7.4
Stefan Wahren
2017-12-19 07:02:14 UTC
Permalink
Hi Marc,
Post by Stefan Wahren
This patch series implements DT polarity support for the 1st level interrupt
controller.
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
.../interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 +-
arch/arm/boot/dts/bcm2836.dtsi | 14 +++----
arch/arm/boot/dts/bcm2837.dtsi | 12 +++---
arch/arm/boot/dts/bcm283x.dtsi | 1 +
drivers/irqchip/irq-bcm2836.c | 46 +++++++++++++---------
5 files changed, 44 insertions(+), 33 deletions(-)
is this series okay?
Marc Zyngier
2017-12-19 16:36:50 UTC
Permalink
Post by Stefan Wahren
Hi Marc,
Post by Stefan Wahren
This patch series implements DT polarity support for the 1st level interrupt
controller.
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
.../interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 +-
arch/arm/boot/dts/bcm2836.dtsi | 14 +++----
arch/arm/boot/dts/bcm2837.dtsi | 12 +++---
arch/arm/boot/dts/bcm283x.dtsi | 1 +
drivers/irqchip/irq-bcm2836.c | 46 +++++++++++++---------
5 files changed, 44 insertions(+), 33 deletions(-)
is this series okay?
Yes, it does look good. I'll queue that for 4.16.

Thanks,

M.
--
Jazz is not dead. It just smells funny...
Marc Zyngier
2017-12-19 18:50:46 UTC
Permalink
Post by Marc Zyngier
Post by Stefan Wahren
Hi Marc,
Post by Stefan Wahren
This patch series implements DT polarity support for the 1st level interrupt
controller.
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
.../interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 +-
arch/arm/boot/dts/bcm2836.dtsi | 14 +++----
arch/arm/boot/dts/bcm2837.dtsi | 12 +++---
arch/arm/boot/dts/bcm283x.dtsi | 1 +
drivers/irqchip/irq-bcm2836.c | 46 +++++++++++++---------
5 files changed, 44 insertions(+), 33 deletions(-)
is this series okay?
Yes, it does look good. I'll queue that for 4.16.
Are you grabbing all 3, or should I be grabbing the DT one?
All 3, if that's OK with you.

M.
--
Jazz is not dead. It just smells funny...
Stefan Wahren
2018-01-03 17:10:40 UTC
Permalink
Hi Marc,
Post by Marc Zyngier
Post by Stefan Wahren
Hi Marc,
Post by Stefan Wahren
This patch series implements DT polarity support for the 1st level interrupt
controller.
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
.../interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 +-
arch/arm/boot/dts/bcm2836.dtsi | 14 +++----
arch/arm/boot/dts/bcm2837.dtsi | 12 +++---
arch/arm/boot/dts/bcm283x.dtsi | 1 +
drivers/irqchip/irq-bcm2836.c | 46 +++++++++++++---------
5 files changed, 44 insertions(+), 33 deletions(-)
is this series okay?
Yes, it does look good. I'll queue that for 4.16.
Thanks,
M.
since i didn't found this in linux-next, please take this as a gentle
reminder.

Thanks
Stefan
Marc Zyngier
2018-01-03 17:14:04 UTC
Permalink
Post by Stefan Wahren
Hi Marc,
Post by Marc Zyngier
Post by Stefan Wahren
Hi Marc,
Post by Stefan Wahren
This patch series implements DT polarity support for the 1st level interrupt
controller.
dt-bindings: bcm2836-l1-intc: add interrupt polarity support
irqchip: irq-bcm2836: add support for DT interrupt polarity
ARM: dts: bcm283x: Define polarity of per-cpu interrupts
.../interrupt-controller/brcm,bcm2836-l1-intc.txt | 4 +-
arch/arm/boot/dts/bcm2836.dtsi | 14 +++----
arch/arm/boot/dts/bcm2837.dtsi | 12 +++---
arch/arm/boot/dts/bcm283x.dtsi | 1 +
drivers/irqchip/irq-bcm2836.c | 46 +++++++++++++---------
5 files changed, 44 insertions(+), 33 deletions(-)
is this series okay?
Yes, it does look good. I'll queue that for 4.16.
Thanks,
M.
since i didn't found this in linux-next, please take this as a gentle
reminder.
It will take some time before I push this to tglx, as I'm otherwise
engaged. Patches are not lost.

Thanks,

M.
--
Jazz is not dead. It just smells funny...
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